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NCP51460 20 mA Micropower Precision Voltage Reference
The NCP51460 is a high performance, low power precision voltage reference. This device combines very high accuracy, low power dissipation and small package size. It can supply output current up to 20 mA at a 3.3 V fixed output voltage with excellent line and load regulation characteristics making it ideal for precision regulator applications. It is designed to be stable with or without an output capacitor. The protective features include Short Circuit and Reverse Input Voltage Protection. The NCP51460 is packaged in a 3-lead surface mount SOT-23 package.
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SOT-23 SN1 SUFFIX CASE 318
* * * * * * * * * * * * *
Fixed Output Voltage 3.3 V VOUT Accuracy 1% over 0 to +100C Wide Input Voltage Range up to 28 V Low Quiescent Current Low Noise Reverse Input Voltage Protection Stable Without an Output Capacitor Available in 3 leads SOT-23 Package Pb-Free Package is Available Handheld Instruments Precision Regulators Data Acquisition Systems High Accuracy Micropower Supplies
MARKING DIAGRAM AND PIN ASSIGNMENT
GND 3 46AMG G 1 VIN 2 VOUT
Typical Applications
(Top View) 46A = Specific Device Code M = Date Code G = Pb-Free Package (Note: Microdot may be in either location)
ORDERING INFORMATION
VIN = 4.2 to 28 V VIN CIN 0.1 mF NCP51460 (3.3 V fixed) GND VOUT 3.3 V VOUT
See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet.
Figure 1. Typical Application Schematics
(c) Semiconductor Components Industries, LLC, 2010
April, 2010 - Rev. 0
1
Publication Order Number: NCP51460/D
NCP51460
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Table 1. PIN FUNCTION DESCRIPTION
Pin No. 1 2 3 Pin Name VIN Description Positive Input Voltage VOUT GND Regulated Output Voltage Power Supply Ground; Device Substrate
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating Input Voltage (Note 1) Reverse Input Voltage Output Short Circuit Duration, TA = 25C VIN 27 V VIN > 27 V Maximum Junction Temperature Storage Temperature ESD Capability, Human Body Model (Note 2) ESD Capability, Machine Model (Note 2)
Symbol VIN VIN tSC
Value 30 -15 R 50 150
Unit V V sec
TJ(max) TSTG ESDHBM ESDMM
C C V V
-65 to 150 2000 200
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC-Q100-002 (EIA/JESD22-A114) ESD Machine Model tested per AEC-Q100-003 (EIA/JESD22-A115) Latch up Current Maximum Rating: 150 mA per JEDEC standard: JESD78.
Table 3. THERMAL CHARACTERISTICS
Rating Thermal Characteristics, SOT-23 package Thermal Resistance, Junction-to-Ambient (Note 3) 3. Soldered on 1 oz 50 mm2 FR4 copper area. Symbol RqJA Value 246 Unit C/W
Table 4. OPERATING RANGES
Rating Operating Input Voltage (Note 4) Operating Ambient Temperature Range Symbol VIN TA Min VOUT + 0.9 0 Max 28 100 Unit V C
4. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
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Table 5. ELECTRICAL CHARACTERISTICS (VIN = VOUT + 2.5 V, IOUT = 0, CIN = 0.1 mF, COUT = 0 mF; For typical values TA = 25C, for min/max values 0C TA 100C unless otherwise noted.) (Note 5).
Parameter Output Voltage Line Regulation Load Regulation VIN = VOUT + 0.9 V to VOUT + 2.5 V VIN = VOUT + 2.5 V to VOUT + 20 V IOUT = 0 to 100 mA IOUT = 0 to 10 mA IOUT = 0 to 20 mA Measured at VOUT - 2% IOUT = 0 mA IOUT = 10 mA IOUT = 0 mA, TA = 25C IOUT = 0 mA, 0C TA 100C VOUT = 0 V, TA = 25C VIN = - 15 V, TA = 25C f = 0.1 Hz to 10 Hz f = 10 Hz to 1 kHz 0C TA 100C Test Conditions Symbol VOUT RegLINE RegLOAD Min 3.267 (-1%) - - - - - - - - - - - - - Typ 3.3 150 65 1100 150 120 0.65 0.9 140 80 0.1 12 18 18 Max 3.333 (+1%) 500 130 4000 300 300 0.9 1.4 200 220 - 10 - - Unit V ppm/V ppm/mA
Dropout Voltage
VDO
V
Quiescent Current Output Short Circuit Current Reverse Leakage Output Noise Voltage (Note 6) Output Voltage Temperature Coefficient
IQ ISC ILEAK VN TCO
mA mA mA mVPP mVrms ppm/C
5. Performance guaranteed over the indicated operating temperature range by design and/or characterization, tested at TJ = TA = 25C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 6. The noise spectral density from 0.1 Hz to 10 Hz is measured, then the integral output noise voltage in this range is calculated. Finally the peak to peak noise is calculated as 5x integral output noise.
TYPICAL CHARACTERISTICS
3.332 3.327 IOUT = 0 mA 3.322 COUT = 0 mF 3.317 3.312 VIN = VOUT + 20 V 3.307 3.302 3.297 3.292 VIN = VOUT + 0.9 V VIN = VOUT + 2.5 V 3.287 3.282 3.277 3.272 3.267 -40 -20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (C) 3.332 3.327 VIN = VOUT + 2.5 V 3.322 COUT = 0 mF 3.317 3.312 IOUT = 0 mA 3.307 3.302 3.297 3.292 IOUT = 10 mA 3.287 3.282 IOUT = 20 mA 3.277 3.272 3.267 -40 -20 0 20 40 60 80
VOUT, OUTPUT VOLTAGE (V)
140
VOUT, OUTPUT VOLTAGE (V)
100
120 140
TJ, JUNCTION TEMPERATURE (C)
Figure 2. Output Voltage vs. Temperature
Figure 3. Output Voltage vs. Temperature
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TYPICAL CHARACTERISTICS
3.332 3.327 VIN = 5.8 V 3.322 IOUT = 0 mA 3.317 COUT = 0 mF 3.312 Unit 1 3.307 3.302 3.297 3.292 3.287 Unit 3 Unit 2 3.282 3.277 3.272 3.267 -40 -20 0 20 1.2 VDROP, DROPOUT VOLTAGE (V) Three Typical Parts 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 -40 -20 0 20 40 60 80 100 120 140 IO = 0 mA IO = 1 mA IO = 5 mA COUT = 0 mF IO = 20 mA IO = 10 mA
VOUT, OUTPUT VOLTAGE (V)
40
60
80
100
120
140
TJ, JUNCTION TEMPERATURE (C)
TJ, JUNCTION TEMPERATURE (C)
Figure 4. Output Voltage vs. Temperature
450 IQ, QUIESCENT CURRENT (mA) 400 350 300 250 200 150 100 50 0 0 2 4 TJ = -25C 6 8 10 12 14 16 18 20 REGLINE, LINE REGULATION (mV) IOUT = 0 mA COUT = 0 mF 5.0
Figure 5. Dropout Voltage
IOUT = 0 mA 4.5 C OUT = 0 mF 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 -40 -20 0 20
VIN = 5.8 to 23.3 V VIN = 5.8 to 18.3 V
TJ = 125C TJ = 25C
VIN = 5.8 to 15.3 V VIN = 5.8 to 12.3 V VIN = 5.8 to 9.3 V 40 60 80 100 120 140
VIN, INPUT VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (C)
Figure 6. Quiescent Current
12 REGLOAD, LOAD REGULATION (mV) 10 8 6 4 2 0 -40 IOUT = 0 to 1 mA -20 0 20 40 60 IOUT = 0 to 5 mA 80 100 120 140 160 LOADREG, LOAD REGULATION (mV) IOUT = 0 to 15 mA 140 120 100 80 60
Figure 7. Line Regulation
VIN = 5.8 V COUT = 0 mF IOUT = 0 to IOUT = 0 to 20 mA 10 mA
VIN = 5.8 V COUT = 0 mF IOUT = 0 mA down to -2 mA
IOUT = 0 mA 40 down to -1.50 mA 20 0 -40 -20 0
IOUT = 0 mA down to -1.2 mA
IOUT = 0 mA down to -500 mA
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (C)
TJ, JUNCTION TEMPERATURE (C)
Figure 8. Load Regulation Sourcing
Figure 9. Load Regulation Sinking
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TYPICAL CHARACTERISTICS
ISC, SHORT CIRCUIT CURRENT (mA)
140 130 120 110 100 90 80 70 60 50 40 -40 -20 0 20 40 60 80 100 120 140 VIN = 5.8 V VIN = 28 V VIN = 15 V COUT = 0 mF
PSRR, POWER SUPPLY REJECTION RATIO (dB)
80 70 60 50 40 30 20 10 0 10 IOUT = 0 mA VIN = 5.8 VDC $50 mVAC COUT = 0 mF TJ = 25C 100 1000 10k f, FREQUENCY IOUT = 1 mA 100k 1M IOUT = 20 mA
TJ, JUNCTION TEMPERATURE (C)
Figure 10. Short Circuit Current
PSRR, POWER SUPPLY REJECTION RATIO (dB) 80 70 60 50 40 30 20 10 0 10 IOUT = 0 mA IOUT = 20 mA IOUT = 1 mA PSRR, POWER SUPPLY REJECTION RATIO (dB) 100 90 80 70 60 50 40 30 20 10 0
Figure 11. Power Supply Rejection Ratio Cout = 0 mF
IOUT = 1 mA
IOUT = 0 mA IOUT = 20 mA
VIN = 5.8 VDC $50 mVAC COUT = 0.1 mF MLCC TJ = 25C 100
VIN = 5.8 VDC $50 mVAC COUT = 1 mF MLCC TJ = 25C 10 100 1000 10k f, FREQUENCY
1000 10k f, FREQUENCY
100k
1M
100k
1M
Figure 12. Power Supply Rejection Ratio Cout = 0.1 mF
PSRR, POWER SUPPLY REJECTION RATIO (dB) 90 80 70 60 50 40 30 20 10 0 4 5 6 7 8 9 10 VIN, INPUT VOLTAGE (V) 11 12 fRIPPLE = 100 kHz fRIPPLE = 1 MHz IOUT = 10 mA, COUT = 0 mF, TA = 25C fRIPPLE = 100 Hz fRIPPLE = 10 kHz PSRR, POWER SUPPLY REJECTION RATIO (dB) 80 70 60 50 40 30 20 10 0 4
Figure 13. Power Supply Rejection Ratio Cout = 1 mF
IOUT = 20 mA, COUT = 0 mF, TA = 25C fRIPPLE = 100 Hz fRIPPLE = 10 kHz
fRIPPLE = 100 kHz fRIPPLE = 1 MHz
5
6
7 8 9 10 VIN, INPUT VOLTAGE (V)
11
12
Figure 14. Power Supply Rejection Ratio vs. Input Voltage
Figure 15. Power Supply Rejection Ratio vs. Input Voltage
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NCP51460
TYPICAL CHARACTERISTICS
2.4 Vn, OUTPUT NOISE (mVrms/rtHz) Vn, OUTPUT NOISE (mVrms/rtHz) 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0.1 1 f, FREQUENCY (Hz) 10 VIN = 5.8 V IOUT = 0 mA, COUT = 0 mF, TA = 25C 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 10 100 1000 10k 100k 1M 10 Hz - 1 kHz Integral Noise: Vn = 18 mVrms VIN = 5.8 V IOUT = 0 mA to 20 mA, COUT = 0 mF, TA = 25C
0.1 Hz - 10 Hz Integral Noise: Vn = 2.28 mVrms
f, FREQUENCY (Hz)
Figure 16. Output Voltage Noise 0.1 Hz - 10 Hz
2.0 Vn, OUTPUT NOISE (mVrms/rtHz) 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 10 100 IOUT = 10 mA IOUT = 20 mA 1000 10k 100k 1M f, FREQUENCY (Hz) IOUT = 1 mA Vn, OUTPUT NOISE (mVrms/rtHz) 1.8 VIN = 5.8 V IOUT = 0 mA to 20 mA, COUT = 0.1 mF MLCC, TA = 25C
Figure 17. Output Voltage Noise 10 Hz - 1 MHz
3.0 2.8 VIN = 5.8 V 2.6 IOUT = 0 mA to 20 mA, 2.4 COUT = 1 mF MLCC, 2.2 TA = 25C IOUT = 1 mA 2.0 1.8 1.6 IOUT = 10 mA 1.4 IOUT = 0 mA 1.2 1.0 0.8 0.6 0.4 IOUT = 20 mA 0.2 0.0 10 100 1000 10k 100k 1M f, FREQUENCY (Hz)
IOUT = 0 mA
Figure 18. Output Voltage Noise 10 Hz - 1 MHz COUT = 0.1 mF
2.0 Vn, OUTPUT NOISE (mVrms/rtHz) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 10 100 IOUT = 0 mA 1000 10k 100k VIN = 5.8 V IOUT = 0 mA to 20 mA, COUT = 10 mF MLCC, TA = 25C
Figure 19. Output Voltage Noise 10 Hz - 1 MHz COUT = 1 mF
IOUT = 10 mA IOUT = 20 mA VOUT, OUTPUT VOLTAGE (50 mV/DIV) IOUT = 10 mA IOUT = 0 mA
IOUT = 1 mA
3.45 3.40 3.35 3.30 3.25 3.20 3.15 3.10
VOUT
VIN = 0 to 5.8 V, COUT = 0 mF, trise_fall = 10 mA/1 ms, TA = 25C
1M
f, FREQUENCY (Hz)
TIME (20 ms/DIV)
Figure 20. Output Voltage Noise 10 Hz - 1 MHz COUT = 10 mF
Figure 21. Load Transient Response 0 - 10 mA
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NCP51460
TYPICAL CHARACTERISTICS
VOUT, OUTPUT VOLTAGE (200 mV/DIV)
VOUT, OUTPUT VOLTAGE (100 mV/DIV)
IOUT = 0 mA
IOUT = 20 mA
3.4 3.3 2.2 3.4 3.3 3.2 3.4 3.3 3.2 3.4 3.3 2.2
VOUT VOUT VOUT VOUT IOUT = 0 mA IOUT = 10 mA TIME (50 ms/DIV)
COUT = 0 mF COUT = 0.1 mF MLCC COUT = 1 mF MLCC
4.1 3.9 3.7 3.5 3.3 3.1 2.9 2.7
VOUT
COUT = 4.7 mF MLCC VIN = 5.8 V, TA = 25C, trise_fall = 10 mA/1 ms
VIN = 5.8 V, COUT = 0 mF, trise_fall = 20 mA/1 ms, TA = 25C
TIME (10 ms/DIV)
Figure 22. Load Transient Response 0 - 20 mA
Figure 23. Load Transient Responses COUT = 0 - 4.7 mF
VIN, INPUT VOLTAGE (2 V/DIV)
VOUT, OUTPUT VIN, INPUT VOLTAGE VOLTAGE (1 V/DIV) (2 V/DIV)
6 4 2 0 VIN
6 4 2 0
VIN
VOUT, OUTPUT VOLTAGE (1 V/DIV)
3 2 1 0 VOUT VIN = 0 V to 5.8 V, CIN = 0 mF, COUT = 0 mF, IOUT = 0 mA, TA = 25C, trise = 20 ms TIME (10 ms/DIV)
3 2 1 0
VIN = 5.8 V to 0 V, COUT = CIN = 0 mF, IOUT = 0 mA, TA = 25C, trise_fall = 25 ms VOUT TIME (50 ms/DIV)
Figure 24. Turn-On
Figure 25. Turn-Off
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APPLICATIONS INFORMATION It is recommended to connect a 0.1 mF Ceramic capacitor between VIN and GND pin of the device. This capacitor will provide a low impedance path for unwanted AC signals or noise present on the input voltage. The input capacitor will also limit the influence of input trace inductances and Power Supply resistance during sudden load current changes. Higher capacitances will improve the Power Supply Rejection Ratio and line transient response. The NCP51460 was designed to be stable without an additional output capacitor. Without the output capacitor the VOUT settling times during Reference Turn-on or Turn-off can be as short as 20 ms (Refer to Figure 24 and 25). The Load Transient Responses without COUT (Figure 21 and 22) show good stability of NCP51460 even for fast output current changes from 0 mA to full load. If smaller VOUT deviations during load current changes are required, it is possible to add some external capacitance as shown on Figure 26.
VIN = 4.2 to 28 V CIN 0.1 mF VIN VOUT NCP51460 (3.3 V fixed) GND VOUT 3.3 V COUT VOUT, OUTPUT VOLTAGE (50 mV/DIV)
Input Decoupling Capacitor (CIN)
3.35 3.30 3.25 3.35 3.30 3.25
VOUT
COUT = 1 mF MLCC + 2 W
COUT = 1 mF MLCC
Output Decoupling Capacitor (COUT)
IOUT = 10 mA
VIN = 5.8 V, TA = 25C, trise_fall = 10 mA/1 ms
IOUT = 0 mA TIME (50 ms/DIV)
Figure 27.
The device was determined to be stable with Aluminum, Ceramic and Tantalum Capacitors with capacitances ranging from 0 to 100 mF at TA = 25C.
Turn-On Response
It is possible to achieve very fast Turn-On time when fast VIN ramp is applied to NCP51460 input as shown on Figure 24. However if the Input Voltage change from 0 V to nominal Input Voltage is extremely fast, the Output Voltage settling time will increase. Figure 28 below shows this effect when the Input Voltage change is 5.8 V / 2 ms.
VOUT, OUTPUT VIN, INPUT VOLTAGE VOLTAGE (1 V/DIV) (2 V/DIV) 6 4 2 0 VIN
Figure 26. Output Capacitor Connection
The COUT will reduce the overshoot and undershoot but will increase the settling time and can introduce some ringing of the output voltage during fast load transients. NCP51460 behavior for different values of ceramic X7R output capacitors is depicted on Figure 23. The Output Voltage ringing and settling times can be reduced by using some additional resistance in series with the Ceramic Capacitor or by using Tantalum or Aluminum Capacitors which have higher ESR values. Figure 27 below shows the Load Transient improvement after adding an additional 2 W series resistor to a 1 mF Ceramics Capacitor.
3 2 1 0 VOUT
VIN = 0 V to 5.8 V, CIN = 0 mF, COUT = 0 mF, IOUT = 0 mA, TA = 25C, trise = 45 ms TIME (10 ms/DIV)
Figure 28.
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A 0.1 mF or larger input capacitor will help to decrease the dv/dt of the input voltage and improve stability during large load current changes. During the Turn-On for certain conditions the output voltage can exhibit an overshoot. The amount of the overshoot strongly depends on application conditions i.e. input voltage level, slew rate, input and output capacitors, and output current. The maximum value of the overshoot isn't guaranteed for this device. The figure below shows an example of the Turn-On overshoot.
VOUT, OUTPUT VIN, INPUT VOLTAGE VOLTAGE (1 V/DIV) (2 V/DIV)
can be slightly different and should be confirmed in the end application. No external voltage source should be connected directly to the VOUT pin of NCP51460 regulator. If the external source forces the output voltage to be greater than the nominal output voltage level, the current will start to flow from the Voltage Source to the VOUT pin. This current will increase with the Output Voltage applied and can cause damage to the device if VOUT > 10 V Typ. at 25C (Figure 30).
24 IO, CURRENT INTO VOUT PIN (mA) 20 16 12 8 4 0 COUT = 0 mF, TA = 25C
6 4 2 0
3 2 1 0
VIN = 0 V to 6 V, COUT = 0 mF, IOUT = 1 mA, TA = 25C, trise = 30 ms TIME (10 ms/DIV)
3
4
5
6
7
8
9
10
VOUT, OUTPUT VOLTAGE (V)
Figure 29. Turn-Off Response Output Noise
Figure 30.
Vn, OUTPUT VOLTAGE NOISE (mVrms/rtHz)
The Turn-Off response time is directly proportional to the output capacitor value and inversely proportional to the load value. The NCP51460 device does not have any dedicated internal circuitry to discharge the output capacitor when the input voltage is turned-off or disconnected. This is why when large output capacitors are used and very small output current is drawn, it can take a considerable amount of time to discharge the capacitor. If short turn-off times are required, the output capacitor value should be minimized i.e. with no output capacitor a 20 ms turn-off time can be achieved.
Protection Features
The NCP51460 Output Voltage Noise strongly depends on the output capacitor value and load value. This is caused by the fact that the bandwidth of the Reference is inversely proportional to the capacitor value and directly proportional to the output current. The Reference bandwidth directly determines the point where the output voltage noise starts to fall. This can be observed at the Figure 31 below.
2.2 VIN = 5.8 V IOUT = 0 mA, 1.8 C OUT = 0 - 10 mF MLCC, 1.6 TA = 25C 2.0 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 10 100 1000 10k 100k 1M COUT = 10 mF COUT = 0 mF COUT = 1.0 mF
COUT = 0.1 mF
The NCP51460 device is equipped with reverse input voltage protection which will help to protect the device when Input voltage polarity is reversed. In this circumstance the Input current will be minimized to typically less than 0.1 mA. The short circuit protection will protect the device under the condition that the VOUT is suddenly shorted to ground. The short circuit protection will work properly up to an Input Voltage of 27 V at TA = 25C. Depending on the PCB trace width and thickness, air flow and process spread this value
f, FREQUENCY (Hz)
Figure 31.
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The peaks which are visible on the noise spectrum are reflecting the stability of the NCP51460 device. In the comparison in Figure 31 it can be noticed that 0 mF and 10 mF cases represents the best stability.
Thermal Characteristics
The power dissipated by the NCP51460 can be calculated from the following equations:
P D [ V IN(I Q@I OUT) ) I OUT(V IN * V OUT) (eq. 2)
or
V IN(MAX) [ P D(MAX) ) (V OUT @ I OUT) I OUT ) I Q
(eq. 3)
As power dissipation in the NCP51460 increases, it may become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. The board material and the ambient temperature affect the rate of junction temperature rise for the part. The maximum power dissipation the NCP51460 can handle is given by:
P D(MAX) + [T J(MAX) * T A] R qJA
(eq. 1)
PCB Layout Recommendations
VIN and GND printed circuit board traces should be as wide as possible. When the impedance of these traces is high, there is a chance to pick up noise and cause the regulator to malfunction. Place external components, especially the output capacitor, as close as possible to the NCP51460, and make traces as short as possible.
Since TJ is not recommended to exceed 100C (TJ(MAX)), then the NCP51460 can dissipate up to 305 mW when the ambient temperature (TA) is 25C.
ORDERING INFORMATION
Device NCP51460SN33T1G Marking Code 46A Package SOT-23 (Pb-Free) Shipping 3,000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
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PACKAGE DIMENSIONS
SOT-23 (TO-236) CASE 318-08 ISSUE AP
D
SEE VIEW C 3 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. DIM A A1 b c D E e L L1 HE q MIN 0.89 0.01 0.37 0.09 2.80 1.20 1.78 0.10 0.35 2.10 0 MILLIMETERS NOM MAX 1.00 1.11 0.06 0.10 0.44 0.50 0.13 0.18 2.90 3.04 1.30 1.40 1.90 2.04 0.20 0.30 0.54 0.69 2.40 2.64 --- 10 MIN 0.035 0.001 0.015 0.003 0.110 0.047 0.070 0.004 0.014 0.083 0 INCHES NOM 0.040 0.002 0.018 0.005 0.114 0.051 0.075 0.008 0.021 0.094 --- MAX 0.044 0.004 0.020 0.007 0.120 0.055 0.081 0.012 0.029 0.104 10
E
1 2
HE c e b q 0.25
A A1 L L1 VIEW C
SOLDERING FOOTPRINT*
0.95 0.037 0.95 0.037
2.0 0.079 0.9 0.035
SCALE 10:1
0.8 0.031
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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